Experimental results: (a) VSI-1 three phase currents (i_abc) (scale 5 A/div) and phase voltage (V_in) (scale 200 V/div), time (scale 10 ms/div), (b) inverter line voltage and grid voltage (scale 100 V/div), time (scale 10 ms/div), (c) dynamic performance under a step load change (scale of VSI-1 200 V/div) all currents (scales-5 A/div), time (scale 200 ms/div), (d) inverter pole voltage (scale 100 V/div), time (scale 5 ms/div), (e) in islanding the VSI-2 is feeding the CPL V_in (200 V/div), all current (5 A/div), time (scale 10 ms/div), (f) unity power factor operation V_in and V_s equal to (100 V/div), i_L and i_s equal to (5 A/div), time (scale 10 ms/div) and (g) dynamic performance under a step load change of VSI-2 (scale 5 A/div), time (scale 200 ms/div).